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Gate-tunable junctions are key elements in quantum devices based on hybrid semiconductor–superconductor materials. They serve multiple purposes ranging from tunnel spectroscopy probes to voltage-controlled qubit operations in gatemon and topological qubits. Common to all is that junction transparency plays a critical role. In this study, we grow single-crystalline InAs, InSb, and InAs1–xSbxsemiconductor nanowires with epitaxial Al, Sn, and Pb superconductors and in situshadowed junctions in a single-step molecular beam epitaxy process. We investigate correlations between fabrication parameters, junction morphologies, and electronic transport properties of the junctions and show that the examined in situshadowed junctions are of significantly higher quality than the etched junctions. By varying the edge sharpness of the shadow junctions, we show that the sharpest edges yield the highest junction transparency for all three examined semiconductors. Further, critical supercurrent measurements reveal an extraordinarily high ICRN, close to the KO-2 limit. This study demonstrates a promising engineering path toward reliable gate-tunable superconducting qubits.

Electron transport phenomena in molecular monolayers are complex and potentially different from those of single molecules because of, for example, molecule–molecule interactions. Unfortunately, access to detailed mechanistic investigations of molecular monolayer junctions at ultralow temperatures is typically hampered by the narrow range of operating temperatures for most large-area device platforms. Here, we present a highly optimized chemically derived graphene material with a near temperature-independent conductance profile. Using this material as a conducting interlayer electrode in solid-state molecular electronic devices, we show robust and reliable large-area molecular junction operation at temperatures ranging from room temperature to below 1 K, and we demonstrate the ability to measure inelastic electron tunneling spectroscopy of a conjugated molecular monolayer at cryogenic temperatures.

Construction of molecular devices is one of the most promising approaches for the ultimate miniaturization of electronic devices, the groundwork of which is the fabrication of nanogap electrodes. Here we report a method to fabricate nanogap electrodes through thermal annealing based on single grain boundary junction. By performing low temperature thermal process, single grain boundary junction can be broken and change into a suspended gap with gap width down to sub-5 nanometers, which is beyond the fabrication precision of traditional lithography technologies. With the advantage of shape stability, no debris and high time efficiency, such nanogap electrodes is promising in constructing molecular devices with two or three-terminals. 纳米尺度分子器件是最有可能实现超高密度集成电路的途径之一, 而纳米间隙电极对的制备是分子器件的构筑基础. 本文利用热处理诱导晶间断裂现象来进行纳米间隙电极对的构筑. 通过低温热处理过程实现单个金晶界结的断裂, 使其从晶界结转化为悬空纳米间隙电极对. 所制备的纳米间隙电极对的间隙尺寸可达到亚5纳米, 采用 传统的微纳米加工方法很难实现该尺寸间隙电极对. 利用热处理诱导晶间断裂所制备的纳米间隙电极对具有诸多优点, 如形状稳定性好、间隙中无杂质颗粒残留等, 有望用来构筑两端或三端分子器件.

Free-standing metallic nanostructures are considered to be highly relevant to many branches of science and technology with applications of three dimensional metallic nanostructures ranging from optical reflectors, actuators, and antenna, to free-standing electrodes, mechanical, optical, and electrical resonators and sensors. Strain-induced out-of-plane fabrication has emerged as an effective method which uses relaxation of strain-mismatched materials. In this work, we report a study of the thermal annealing-induced shape modification of free-standing nanostructures, which was achieved by introducing compositional or microstructural nonuniformity to the nanowires. In particular gradient, segmented and striped hetero-nanowires were grown by focused-ion-beam-induced chemical vapor deposition, followed by rapid thermal annealing in a N2atmosphere. Various free-standing nanostructures were produced as a result of the crystalline/grain growth and stress relief.

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