35 results on '"Yesung Kang"'
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2. A Multi-Mode 8K-MAC HW-Utilization-Aware Neural Processing Unit with a Unified Multi-Precision Datapath in 4nm Flagship Mobile SoC.
3. Approach to Improve the Performance Using Bit-level Sparsity in Neural Networks.
4. GRLC: grid-based run-length compression for energy-efficient CNN accelerator.
5. Analysis and Solution of CNN Accuracy Reduction over Channel Loop Tiling.
6. Low-Power Ternary Multiplication Using Approximate Computing.
7. A Novel Ternary Multiplier Based on Ternary CMOS Compact Model.
8. Novel approximate synthesis flow for energy-efficient FIR filter.
9. Outlier-aware Time-multiplexing MAC for Higher Energy-Efficiency on CNNs.
10. A Wide-Range On-Chip Leakage Sensor Using a Current-Frequency Converting Technique in 65-nm Technology Node.
11. Low-Power Ternary Multiplication Using Approximate Computing
12. Intra-Gate Length Biasing for Leakage Optimization in 45 nm Technology Node.
13. FPGA Controller Design for High-Frequency LLC Resonant Converters
14. Approach to Improve the Performance Using Bit-level Sparsity in Neural Networks
15. GRLC
16. Analysis and Solution of CNN Accuracy Reduction over Channel Loop Tiling
17. Outlier-aware Time-multiplexing MAC for Higher Energy-Efficiency on CNNs
18. A Novel Ternary Multiplier Based on Ternary CMOS Compact Model
19. Channel Length Biasing for Improving Read Margin of the 8T SRAM at Near Threshold Operation
20. Intra-Gate Length Biasing for Leakage Optimization in 45 nm Technology Node
21. Novel approximate synthesis flow for energy-efficient FIR filter
22. Analysis of on chip decoupling capacitor in the double-gate FinFETs with PEEC-based power delivery network
23. Transistor layout optimization for leakage saving
24. Simple and accurate capacitance modeling of 32nm multi-fin FinFET
25. Simple and accurate modeling of double-gate FinFET fin body variations
26. Analysis of on chip decoupling capacitor in the double-gate FinFETs with PEEC-based power delivery network.
27. Low-Power Ternary Multiplication Using Approximate Computing.
28. Novel approximate synthesis flow for energy-efficient FIR filter.
29. [Front matter].
30. A Wide-Range On-Chip Leakage Sensor Using a Current–Frequency Converting Technique in 65-nm Technology Node.
31. Channel Length Biasing for Improving Read Margin of the 8T SRAM at Near Threshold Operation.
32. Simple and accurate capacitance modeling of 32nm multi-fin FinFET.
33. Transistor layout optimization for leakage saving.
34. Contents.
35. WEEKENDER: going out
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