1. A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology
- Author
-
Zhang, Bo, Vasani, Anand, Sinha, Ashutosh, Nilchi, Alireza, Tong, Haitao, Rao, Lakshmi P., Khanoyan, Karapet, Hatamkhani, Hamid, Yang, Xiaochen, Meng, Xin, Wong, Alexander, Kim, Jun, Jing, Ping, Sun, Yehui, Nazemi, Ali, Liu, Dean, Brewster, Anthony, Cao, Jun, and Momtaz, Afshin
- Abstract
This article presents a power- and area-efficient multistandard serial link transceiver designed for application rates of up to 112 Gb/s, such as OIF CEI-112G and IEEE 802.3ck 400GBASE. The receiver features a continuous time linear equalizer, a programmable gain amplifier (PGA), a three-tap sampling-based feed-forward equalizer, and an 18-tap decision feedback equalizer. The transmitter uses a half-rate 2:1 multiplexer (MUX) with a duty cycle distortion corrected clock and a 7-bit digital to analog converter (DAC)-based driver with a six-tap feed-forward equalizer. The shared phase-locked loop (PLL) has a tuning range of 40–60 GHz with 0.12-ps rms jitter in integer mode and 0.16-ps jitter in fractional-
${N}$ - Published
- 2024
- Full Text
- View/download PDF