Erratum: Gate electrostatic controllability enhancement in nanotube gate all around field effect transistor

Figure Presented. Figure 1 that depicts the 3D structures and y/x-cut profiles of the devices in the article [AIP Adv. 13, 065006, (2023)1] has some errors that need to be corrected, where (b) (3D structureof NW GAAFET) and (c) (3D structure of NT GAAFET); (h)(x-cut profile of NW GAAFet along the channel direction); and (i)(x-cut profile of NT GAAFet along the channel direction) should change their locations with each other. The corrected Fig. 1 appears here. © 2023 Author(s).