Back to Search Start Over

Design Consideration of a 3D Stacked Power Supply on Chip

Authors :
Graduate School of Kyushu Institute of Technology, Kitakyushu, Japan
Ono, Kota
Hiura, Kengo
Matsumoto, Sathoshi
Graduate School of Kyushu Institute of Technology, Kitakyushu, Japan
Ono, Kota
Hiura, Kengo
Matsumoto, Sathoshi
Publication Year :
2019

Abstract

type:Journal Article<br />In recent years, miniaturization and thinning of the power supply are attracted attentions. In this paper, we discuss the structure for the on-chip inductor and assembly technology suitable for 3D power SoC, which stacks GaN power device, passive devices, control circuit, and driver, based on wafer direct bonding technology and clarified the potential of the high frequency switching applications. We also propose the optimum structure and technology according to the switching frequency based on simulations.<br />2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 29 May-1 June 2018, San Diego, CA, USA

Details

Database :
OAIster
Notes :
English
Publication Type :
Electronic Resource
Accession number :
edsoai.on1389679341
Document Type :
Electronic Resource