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GaN on Engineered Bulk Si (GaN-on-EBUS) Substrate for Monolithic Integration of High-/Low-Side Switches in Bridge Circuits

Authors :
Lyu, Gang
Wei, Jin
Song, Wenjie
Zheng, Zheyang
Zhang, Li
Zhang, Jie
Feng, Sirui
Chen, Jing
Lyu, Gang
Wei, Jin
Song, Wenjie
Zheng, Zheyang
Zhang, Li
Zhang, Jie
Feng, Sirui
Chen, Jing
Publication Year :
2022

Abstract

A cost-effective engineered bulk silicon (EBUS) substrate technology is presented, featuring p-n junction implemented on bulk Si substrates using mainstream ion implantation and thermal annealing processes. Standard p-GaN/AlGaN/GaN heterostructures are successfully grown on the EBUS substrate and used to fabricate 200-V enhancement-mode p-GaN gate HEMTs. By creating deep trenches in the EBUS substrate to isolate the local P+ silicon regions underneath the high-side (HS) and low-side (LS) power switches, adverse effects (e.g., back-gating and dynamic on-resistance degradation) in the use of conventional bulk Si substrate are all eliminated. The mechanism of crosstalk suppression in the GaN-on-EBUS platform is revealed in comparison with conventional GaN-on-Si platform and verified by a series of designed tests. IEEE

Details

Database :
OAIster
Notes :
English
Publication Type :
Electronic Resource
Accession number :
edsoai.on1363074794
Document Type :
Electronic Resource