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PVT Analysis for RRAM and STT-MRAM-based Logic Computation-in-Memory

Authors :
Fieback, M. (author)
Münch, Christopher (author)
Gebregiorgis, A.B. (author)
Cardoso Medeiros, G. (author)
Taouil, M. (author)
Hamdioui, S. (author)
Tahoori, Mehdi (author)
Fieback, M. (author)
Münch, Christopher (author)
Gebregiorgis, A.B. (author)
Cardoso Medeiros, G. (author)
Taouil, M. (author)
Hamdioui, S. (author)
Tahoori, Mehdi (author)
Publication Year :
2022

Abstract

Emerging non-volatile resistive memories like Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) and Resistive RAM (RRAM) are in the focus of today’s research. They offer promising alternative computing architectures such as computation-in-memory (CiM) to reduce the transfer overhead between CPU and memory, usually referred to as the memory wall, which is present in all von Neumann architectures. A multitude of architectures with CiM capabilities are based on these devices, due to their inherent resistive behavior and thus their ability to perform calculation directly within the memory, and thus without invoking the CPU at all. However, emerging memories are sensitive to Process, Voltage and Temperature (PVT) variations. This sensitivity has an even larger impact on CiM architectures. In this paper, we analyze and compare the impact of PVT variations on STT-MRAM and RRAM-based CiM architectures. We perform a sensitivity analysis to identify which parts of the CiM structure are most susceptible to PVT variations, for each technology. Based on these analyses, we recommend that STT-MRAM is used in high-performance CiM, while RRAM is used for edge CiM.<br />Accepted author manuscript<br />Computer Engineering<br />Quantum & Computer Engineering

Details

Database :
OAIster
Notes :
English
Publication Type :
Electronic Resource
Accession number :
edsoai.on1340406112
Document Type :
Electronic Resource
Full Text :
https://doi.org/10.1109.ETS54262.2022.9810436