GEMINI: A triple-GEM detector read-out mixed-signal ASIC in 180nm CMOS

This paper presents GEMINI, an entire read-out System-on-Chip (SoC) to be used with the Triple Gas-Electron Multiplier (GEM) detector. Designed in CMOS 180 nm technology, GEMINI pushes towards the state-of-the-art for this peculiar detector front-end, as regards the count rate and detector pixel parasitic capacitance sustainability. It is composed of 16 channels, each performing a charge-to-voltage conversion via a Charge-Sensitive Preamplifier (CSP), a successive event discrimination with channel-independent threshold and an event-triggered reset. The CSP analog output and the LVDS discriminator output are available as chip outputs for each channel. The Q-to-V conversion accuracy is guaranteed by an automatic on-chip calibration unit, compensating for environmental, CMOS process and supply voltage variations. GEMINI is able to sustain a 5 Mcps count rate, managing up to 40 pF pixel capacitance and with a 2.7mW/ch power consumption.