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A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers
- Publication Year :
- 2002
-
Abstract
- A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm(2) in a 0.5-mum chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54),89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA.<br />QC 20100525
Details
- Database :
- OAIster
- Notes :
- English
- Publication Type :
- Electronic Resource
- Accession number :
- edsoai.on1235068476
- Document Type :
- Electronic Resource
- Full Text :
- https://doi.org/10.1109.4.974543