A Si/SiGe MOSFET utilizing low-temperature wafer bonding

Authors :: Koliopoulou, S
Dimitrakis, P
Goustouridis, D
Chatzandroulis, S
Normand, P
Tsoukalas, D
Radamson, Henry
Koliopoulou, S
Dimitrakis, P
Goustouridis, D
Chatzandroulis, S
Normand, P
Tsoukalas, D
Radamson, Henry
Publication Year :: 2005
Abstract: A process scheme for the fabrication of a low temperature SiGe V-groove MOSFET is demonstrated. The transfer and output characteristics show promising results for the device performance. The source/drain resistance and the quality of the gate insulator/SiGe channel must be optimized for device operation improvement.<br />QC 20111012. 0th International Conference on Micro and Nano Engineering. Rotterdam, NETHERLANDS. SEP 19-22, 2004