Cryogenic performance of ultrathin oxide MOS capacitors with in situ doped p(+) poly-Si1-xGex and poly-Si gate materials

A low-temperature electrical characterization of ultrathin oxide MOS capacitors with p(+) poly-Si1-xGex and poly-Si gate is performed. The investigated structures are suitable for future nano-scaled high speed MOSFETs. The aim of this study is to compare the low-temperature performance of poly-Si1-xGex and poly-Si gate MOS structures in the nanoscale channel length regime. Apart from the significant change in the flat band voltage, the result shows that all the poly-Si and poly-Si1-xGex gated MOS structures exhibit two centres of polarity change (zero-temperature coefficients) in capacitance. The second polarity change leads to an exclusive phenomenon in these structures. The low-temperature capacitance is found to be less than high-temperature capacitance at strong accumulation and this is in contrast to what has been observed so far in metal-gated capacitors. It is also observed that the temperature dependence of the tunnelling current is only on the oxide thickness and not on the gate material used.