Extending Hardware Transactional Memory to Support Non-busy Waiting and Non-transactional Actions

Transactional Memory (TM) is a compel ling alternative to locks as a general-purpose concurrency control mechanism, but it is yet unclear whether TM should be implemented as a software or hardware construct. While hardware approaches offer higher performance and can be used in conjunction with legacy languages/code, software approaches are more flexible and currently offer more functionality. In this paper, we try to bridge, in part, the functionality gap between software and hardware TMs by demonstrating how two software TM ideas can be adapted to work in a hardware TM system. Specifically, we demonstrate: 1) a process to efficiently support transaction waiting — both intentional waiting and waiting for a conflicting transaction to complete — by de-scheduling the transacting thread, and 2) the concept of pausing and an implementation of compensation to allow non-idempotent system calls, I/O, and access to high contention data within a long-running transaction. Both mechanisms can be implemented with minimal extensions to an existing hardware TM proposal.