Node to processor allocation for large grain data flow graphs in throughput-critical applications

This thesis describes the issues involved in node allocation for a Large Grain Data Flow (LGDF) model used in Navy signal processing applications. In the model studied, nodes are assigned to processors based on load balancing, communication/computation overlap, and memory module contention. Current models using the Revolving Cylinder (RC) technique for LGDF graph analysis do not adequately address node allocation. Thus, a node to processor allocation component is added to a computer simulator of an LGDF graph model. It is demonstrated that the RC technique, when proper node allocation is taken into account, can improve overall throughput as compared to the First-Come-First- Served (FCFS) technique for high communication/computation costs