Synchronization in coupled Ikeda delay system

In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches – one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA).