A low-power differential cross-coupled FET logic for GaAs asynchronous design

This paper describes a new GaAs MESFET structure, differential cross-coupled FET logic (DC/sup 2/FL), which is compatible with DCFL, DPTL and DCVS circuits. It can be efficiently used in delay-insensitive asynchronous circuits and self-timed rings, as well as in synchronous ones. When combined with the aforementioned differential structures, it offers attractive power savings without performance degradation. As an example, a fully functional 8-bit ripple carry adder has been designed and fabricated, verifying the expected very low power dissipation during the standby state.