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A 120nm low power asynchronous ADC
- Source :
- Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on; Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on, Dec 2004, San Diego, CA, United States. IEEE, pp.60-65
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Abstract
- ISBN 1-59593-137-6<br />This paper discusses the development of a new kind of low power processing chain which dynamically adapts sampling frequency to signals. Thus, the design of an Asynchronous Analog-to-Digital Converter (A-ADC) is tackled. Its principle is based on a non-uniform sampling scheme and asynchronous technology, that allow significant activity and power savings. A test chip targetting 10-bit speech applications has been fabricated using the 120nm CMOS process from STMicroelectronics. The power consumption is lower than 180µW leading to a Figure of Merit two times better than those of classical Nyquist converters recently published.
Details
- Database :
- OAIster
- Journal :
- Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on; Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on, Dec 2004, San Diego, CA, United States. IEEE, pp.60-65
- Notes :
- San Diego, CA, United States, Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on, English
- Publication Type :
- Electronic Resource
- Accession number :
- edsoai.ocn892987282
- Document Type :
- Electronic Resource