Transferred-Electron Logic Device (TELD) Development.

The objectives of this research program are to develop planar GaAs transferred-electron logic devices (TELDs), and to fabricate and evaluate a monolithic full ADDER. The TELD-FET (Field Effect Transistors) combination device provides substantial improvements in operating characteristics over TELD with resistive loads. It has better trigger-sensitivity and stability. The power dissipation can also be reduced to 0.16 to 0.2 of that for TELDs with resistive load. The capacitive output of TELD-FET makes direct interconnections possible without level shifting. Majority logic can be implemented with TELDs which reduces the component count substantially. The full ADDER circuit is a good example of this. Discrete test FET and TELD dc characteristics were evaluated on the curve tracer. FET characteristics were in close agreement with the design goals, but TELDs did not show any substantial current drop. A maximum current drop measured was 10 to 15%, and the design goals are 25 to 35%. Technology was developed for the fabrication of small-scale GaAs integrated circuits. Further improvements are required in the growth of GaAs epitaxial layers which will result in improved device characteristics. The 25 to 30% current drop devices are required for the successful operation of TELD integrated digital circuits.