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Phase-mode pipelined parallel multiplier
- Source :
- IEEE Transactions on Applied Superconductivity. March, 2001, Vol. 11 Issue 1, p541, 4 p.
- Publication Year :
- 2001
-
Abstract
- A study of a pipelined parallel multiplier based on the potential use of phase-mode logic is presented. A variety of gates can be used in the multiplier such as the ICF gate and Adder cell, which are examined.
Details
- ISSN :
- 10518223
- Volume :
- 11
- Issue :
- 1
- Database :
- Gale General OneFile
- Journal :
- IEEE Transactions on Applied Superconductivity
- Publication Type :
- Academic Journal
- Accession number :
- edsgcl.78630941