An asymmetric memory cell using a C-TFT for single-bit-line SRAM's

An asymmetric memory cell, a single-bit-line static random access memory cell, was designed using a complementary thin-film transistor (C-TFT). The structure of the C-TFT was constructed with n-channel and p-channel TFTs which share the same gate. The proposed cell size can be reduced to 88% as compared with the conventional one using 0.4 micrometer design rules. The cell was found to be capable of stable read and write operations with further decreases cell size.