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Fast heuristic and exact algorithms for two-level hazard-free logic minimization
- Source :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Nov, 1998, p1130, 1 p.
- Publication Year :
- 1998
- Subjects :
- Minimization (Electronics) -- Methods
Circuit design -- Methods
Subjects
Details
- ISSN :
- 02780070
- Database :
- Gale General OneFile
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Publication Type :
- Academic Journal
- Accession number :
- edsgcl.53495096