Silicon interface layers at GaAs/AIGaAs heterojunctions

The applicability of the Si interface layer (IL) method to band-offset tuning has been explored. Transport measurements were performed as a function of temperature on GaAs/AIGaAs/GaAs test structures. Fabrication of Si ILs is found not to be a suitable option to control the band offset of GaAs/AIGaAs heterojunctions for low growth temperatures below 500 degrees C. Si diffusion and segregation were prominent despite the relatively low growth temperatures used.