High-performance reconfigurable hardware architecture for restricted Boltzmann machines

Subjects

Subjects :

Neural networks -- Design and construction
Boltzmann constant -- Usage
Parallel processing -- Usage
Digital integrated circuits -- Design and construction
Neural network
Parallel processing
Programmable logic array
Business
Computers
Electronics
Electronics and electrical industries

Details

Language :

English

ISSN :

10459227

Volume :

21

Issue :

11

Database :

Gale General OneFile

Journal :

IEEE Transactions on Neural Networks

Publication Type :

Academic Journal

Accession number :

edsgcl.245707981