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A 3-V 1.3-to-1.8-GHz CMOS voltage controlled oscillator with 0.3-ps jitter

Authors :
Yan, Shing-Tak
Luong, Howard C.
Source :
IEEE Transactions on Circuits and Systems-II: Analog and Digital.. July, 1998, Vol. 45 Issue 7, p876, 5 p.
Publication Year :
1998

Abstract

In this brief, a 3-V three-stage voltage-controlled oscillator (VCO) implemented in a 0.5-[[micro]meter] complementary metal-oxide-semiconductor (CMOS) technology is presented. Using an active-feedback bias circuitry and swing-limiting devices, the proposed VCO achieves a very wide operating frequency range from 1.3 to 1.8 GHz with a relatively constant output amplitude and excellent linearity between the output frequency and the input control current. Both theory and simulation show that the root-mean-square (rms) timing jitter is as small as 0.3 ps. The power supply sensitivity is 5.5%/V, the temperature coefficient is +500 ppm/[degrees] C, and the power consumption is 23 mW. Index Terms - Jitter analysis, jitter simulation, phase-locked loops, phase noise, oscillators, voltage-controlled oscillators.

Details

ISSN :
10577130
Volume :
45
Issue :
7
Database :
Gale General OneFile
Journal :
IEEE Transactions on Circuits and Systems-II: Analog and Digital...
Publication Type :
Academic Journal
Accession number :
edsgcl.20998966