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Capacitive inter-chip data and power transfer for 3-D VLSI
- Source :
- IEEE Transactions on Circuits and Systems-II-Express Briefs. Dec, 2006, Vol. 53 Issue 12, p1348, 5 p.
- Publication Year :
- 2006
-
Abstract
- We report on inter-chip bidirectional communication and power transfer between two stacked chips. The experimental prototype system components were fabricated in a 0.5-[micro]m silicon-on-sapphire CMOS technology. Bi-directional communication between the two chips is experimentally measured at 1 Hz-15 MHz. The circuits on the floating top chip are powered with capacitively coupled energy using a charge pump. This is the first demonstration of simultaneous nongalvanic power and data transfer between chips in a stack. The potential use in 3-D VLSI is aimed at reducing costs and complexity that are associated with galvanic inter-chip vias in 3-D integration. Index Terms--AC coupling, capacitive coupling, chip-to-chip communication, multichip module, proximity communication, silicon-on-insulator (SOI), silicon-on-sapphire (SOS), three-dimensional (3-D) integration.
Details
- Language :
- English
- ISSN :
- 15497747
- Volume :
- 53
- Issue :
- 12
- Database :
- Gale General OneFile
- Journal :
- IEEE Transactions on Circuits and Systems-II-Express Briefs
- Publication Type :
- Academic Journal
- Accession number :
- edsgcl.156553043