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Hot carrier induced interface trap annealing in silicon field effect transistors

Authors :
Das, N.C.
Nathan, V.
Source :
Journal of Applied Physics. Dec 15, 1993, Vol. 74 Issue 12, p7596, 4 p.
Publication Year :
1993

Abstract

Hot carrier stressing with maximum substrate current biasing condition yields interface traps in metal-oxide-semiconductor field effect transistors. The device, when placed at room temperature for 24 hours, does not anneal the interface traps, which is contrasting to the properties of the trapped oxide charged devices. The hot carrier traps are completely annealed by reverse bias coupled to high positive drain voltage.

Details

ISSN :
00218979
Volume :
74
Issue :
12
Database :
Gale General OneFile
Journal :
Journal of Applied Physics
Publication Type :
Academic Journal
Accession number :
edsgcl.15108613