A stacked-CMOS cell technology for high-density SRAM's

A stacked-complentary metal oxide semiconductor technology for realizing high-density static random access memory cells is presented. With the technology, a static noise margin rise and cell size decrease is attributed to a boost in the on-current of the thin film transistor load. The enhanced performance of the thin film transistor load is caused by the solid phase growth fabrication method that results in larger grains of the polysilicon film.