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Double relaxation oscillation SQUID with a 4JL on-chip digital flux locked-loop circuit
- Source :
- IEEE Transactions on Applied Superconductivity. June, 2005, Vol. 15 Issue 2, p332, 4 p.
- Publication Year :
- 2005
-
Abstract
- A design of an up/down counter composed of 4-Junction Logic (JL) gates and the digital/analog (D/A) converter using an R-2R ladder circuit is presented to realize the digital flux locked-loop (FLL) circuit. The 4 JL gates with the Superconducting QUantum Interference Device (SQUID) regulator is developed and the correct logic operations are successfully confirmed using fabricated 4JL gates.
- Subjects :
- Relaxation phenomena -- Analysis
Integrated circuit fabrication -- Methods
Digital-to-analog converters -- Design and construction
Superconducting quantum interference devices -- Design and construction
Integrated circuit fabrication
Business
Electronics
Electronics and electrical industries
Subjects
Details
- Language :
- English
- ISSN :
- 10518223
- Volume :
- 15
- Issue :
- 2
- Database :
- Gale General OneFile
- Journal :
- IEEE Transactions on Applied Superconductivity
- Publication Type :
- Academic Journal
- Accession number :
- edsgcl.135831258