Reorganizing circuits to aid testability

Subjects

Subjects :

Circuit Design
Testing
Time Division Multiplexing
Canonical Form
Test Data Generators
Methods
Logic Circuitry
Gates
Southern California, University of
University of Southern California -- Research

Details

ISSN :

07407475

Volume :

v8

Issue :

n3

Database :

Gale General OneFile

Journal :

IEEE Design & Test of Computers

Publication Type :

Academic Journal

Accession number :

edsgcl.11892691