Low-resistance ultrashallow extension formed by optimized flash lamp annealing

Flash lamp annealing (FLA) technology is proposed as a new method of activating implanted impurities. By optimizing FLA and implantation conditions, junction depth (Xj) at the concentration of 1 x [10.sup.18] c[m.sup.-3] and the sheet resistance of 13 nm and 700 [ohm]/s. for As and 14 nm and 770 [ohm]/sq for B[F.sub.2] with junction leakage lower than 1 x [10.sup.-16] A//[micro][m.sup.2] at 1.5 V were successfully obtained without wafer slip and warpage problems. Index Terms--Activation, crack, flash !amp annealing (FLA), junction leakage, low resistance, MOSFETs, preamorphization, slip, stress, ultrashallow junction.