Performance up gradation of static VAR compensator with thyristor binary switched capacitor and reactor using model reference adaptive controller

There are various static var compensator configurations are available and listed in the literature. Their performances are evaluated based on their voltage support, dynamic response, losses, cost, and additional filter requirement, if any. In this paper, efforts are made to improve the dynamic performance parameter such as rise time, settling time, and peak overshoots. A new topology with an adaptive controller is presented, in which capacitor and reactor banks are divided in their binary values and connected in the shunt. Capacitor and reactor banks are operated by thyristorised switches. Both these banks are operated in closed-loop form as a cascade control. Amongst these, capacitor bank operates as coarse control, and reactor bank acts as fine control. For the performance enhancement, a model reference adaptive controller is used. The system identification toolbox is used to evaluate the mathematical model of the plant with Matlab. The model's performance was analyzed deeply by the adaptive controller with different reference models such as critical, under, and overdamped. The performance parameters such as rise time, settling time, and peak overshoot in the form of reactive power swings, are evaluated and plotted for different adaptive gains using MIT rules. Abbreviations: $ {\textrm{m}_\textrm{p}} $ : Peak overshoot; $ {\textrm{Q}_\textrm{C}} $ : Reactive power of capacitor; $ {\textrm{Q}_\textrm{L}} $ : Reactive power of inductor; $ {\textrm{Q}_{\textrm{TBSC}}} $ : Reactive power of TBSC bank; $ {\textrm{Q}_{\textrm{TBSR}}} $ : Reactive power of TBSR bank; $ {\textrm{t}_\textrm{r}} $ : Rise time; $ {\textrm{t}_\textrm{s}} $ : Settling time; e: Error; Gc(s): Transfer function of TBSC plant; Gl(s): Transfer function of Disturbance plant; Gr(s): Transfer function of TBSR plant; SVC: Static VAR Compensator; t:time; TBSC: Thyristor binary switched capacitor; TBSR: Thyristor binary switched reactor; TSC: Thyristor switched capacitor; TSR: Thyristor switched reactor; u(t): System input; v(t): System disturbance; y(t): System output; Ym: Reference model output; Yp: Plant output; γ: Adaptive gain; θ: Theta