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Design of Reconfigurable Time-to-Digital Converter Based on Cascaded Time Interpolators for Electrical Impedance Spectroscopy
- Source :
- Sensors, Vol 20, Iss 7, p 1889 (2020)
- Publication Year :
- 2020
- Publisher :
- MDPI AG, 2020.
-
Abstract
- This paper presents a reconfigurable time-to-digital converter (TDC) used to quantize the phase of the impedance in electrical impedance spectroscopy (EIS). The TDC in the EIS system must handle a wide input-time range for analysis in the low-frequency range and have a high resolution for analysis in the high-frequency range. The proposed TDC adopts a coarse counter to support a wide input-time range and cascaded time interpolators to improve the time resolution in the high-frequency analysis without increasing the counting clock speed. When the same large interpolation factor is adopted, the cascaded time interpolators have shorter measurement time and smaller chip area than a single-stage time interpolator. A reconfigurable time interpolation factor is adopted to maintain the phase resolution with reasonable measurement time. The fabricated TDC has a peak-to-peak phase error of less than 0.72° over the input frequency range from 1 kHz to 512 kHz and the phase error of less than 2.70° when the range is extended to 2.048 MHz, which demonstrates a competitive performance when compared with previously reported designs.
Details
- Language :
- English
- ISSN :
- 14248220
- Volume :
- 20
- Issue :
- 7
- Database :
- Directory of Open Access Journals
- Journal :
- Sensors
- Publication Type :
- Academic Journal
- Accession number :
- edsdoj.f1aaa7e329874dbf981cd8f54885be3c
- Document Type :
- article
- Full Text :
- https://doi.org/10.3390/s20071889