High-Power-Efficiency Readout Circuit Employing Average Capacitance-to-Voltage Converter for Micro-Electro-Mechanical System Capacitive Accelerometers

A capacitance-to-voltage converter (CVC) is proposed in this paper and applied to a readout circuit for a micro-electro-mechanical system (MEMS) accelerometer to improve the power efficiency. In a traditional readout circuit, the front-end CVC has to operate at a high sampling frequency to resist thermal noise deterioration due to the large parasitic capacitance introduced by the mechanical sensing element. Thus, the back-end analog-to-digital converter (ADC) also has to operate at a high sampling frequency to avoid noise aliasing when sampling the output signal of the CVC, which leads to high power consumption. The average CVC technique is proposed in this paper to reduce the sampling frequency requirement of the back-end ADC and thus reduce the power consumption. Both the traditional readout circuit and the proposed readout circuit are simulated with a commercial 0.18 μm BCD process. The simulation results show that noise aliasing occurs, and the noise power spectral density (PSD) of the traditional readout circuit increases by 12 dB when the sampling frequency of back-end ADC is reduced by 24 dB. However, in the proposed readout circuit, a noise aliasing effect does not occur. Moreover, the proposed readout circuit reduces the power consumption by 53% without thermal noise deterioration. In addition, the proposed CVC circuits are fabricated in an 0.18 μm BCD process, and the test results show that the presented readout circuit based on the average CVC technique can obtain better performance than the traditional CVC-based readout circuit.