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Reducing the Number of Luts for Mealy FSMS with State Transformation

Authors :
Barkalov Alexander
Titarenko Larysa
Mielcarek Kamil
Source :
International Journal of Applied Mathematics and Computer Science, Vol 34, Iss 1, Pp 167-178 (2024)
Publication Year :
2024
Publisher :
Sciendo, 2024.

Abstract

In many digital systems, various sequential blocks are used. This paper is devoted to the case where the model of a Mealy finite state machine (FSM) represents the behaviour of a sequential block. The chip area occupied by an FSM circuit is one of the most important characteristics used in logic synthesis. In this paper, a method is proposed which aims at reducing LUT counts for FPGA-based Mealy FSMs with transformation of state codes into FSM outputs. This is done using the combined state codes. Such an approach allows excluding a block of transformation of binary state codes into extended state codes. The proposed method leads to LUT-based Mealy FSM circuits having exactly three levels of logic blocks. Under certain conditions, each function for any logic level is represented by a circuit including a single LUT. The proposed approach is illustrated with an example of synthesis. The results of experiments conducted using standard benchmarks show that the proposed method produces LUT-based FSM circuits with significantly smaller LUT counts than is the case for circuits produced by other investigated methods (Auto and One-hot of Vivado, JEDI, and transformation of binary codes into extended state codes). The LUT count is decreased by an average of 17.96 to 91.8%. Moreover, if some conditions are met, the decrease in the LUT count is accompanied with a slight improvement in the operating frequency compared with circuits based on extended state codes. The advantages of the proposed method multiply with increasing the numbers of FSM inputs and states.

Details

Language :
English
ISSN :
20838492
Volume :
34
Issue :
1
Database :
Directory of Open Access Journals
Journal :
International Journal of Applied Mathematics and Computer Science
Publication Type :
Academic Journal
Accession number :
edsdoj.2154bca1a41b4c008d8b929f5ab6a1d9
Document Type :
article
Full Text :
https://doi.org/10.61822/amcs-2024-0012