Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels

Abstract Modern electronic systems usually use third‐party IP cores to build basic blocks. However, there may be Hardware Trojans (HTs) in IP cores, which will cause critical security problem. There are already many HT detection methods which claim to detect all publicly available HT benchmarks. But these methods can still be defeated by designing novel HTs. In this article, a method called Blinding HT is proposed, which camouflages itself as a normal circuit and is difficult to be triggered. The Blinding HT hides input signals of HT modules by tracing across multiple sequential levels. This method increases the influence of HT trigger inputs on output signals, so that trigger inputs are not be identified as redundant inputs. In this way, this approach can defeat the detection methods which identify weakly affecting trigger inputs and redundant trigger inputs across multiple sequential levels. As shown in the experimental results, the proposed HTs are hardly detected even by the novel HT detection approach based on machine learning algorithm. These HTs have small footprints on the design in terms of area and power to resist the side‐channel effect analysis. The proposed HT has stealthiness, general applicability and imperceptibility.