Deep Learning based Performance Testing for Analog Integrated Circuits

MLA

Cao, Jiawei, et al. Deep Learning Based Performance Testing for Analog Integrated Circuits. 2024. EBSCOhost, widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsarx&AN=edsarx.2406.00516&authtype=sso&custid=ns315887.

APA

Cao, J., Guo, C., Li, H., Wang, Z., Wang, H., & Li, G. Y. (2024). Deep Learning based Performance Testing for Analog Integrated Circuits.

Chicago

Cao, Jiawei, Chongtao Guo, Hao Li, Zhigang Wang, Houjun Wang, and Geoffrey Ye Li. 2024. “Deep Learning Based Performance Testing for Analog Integrated Circuits.” http://widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsarx&AN=edsarx.2406.00516&authtype=sso&custid=ns315887.