Implementation of Multiple-Step Quantized STDP Based on Novel Memristive Synapses

Memristors have been widely studied as artificial synapses in neuromorphic circuits, due to their functional similarity with biological synapses, low operating power, and high integration density. In this work, a memristive synapse, composed of four memristors and two resistors, for SNN is designed and utilized for a neuron circuit implementing the robust spike-timing dependent plasticity learning. The synapse can be either excitatory or inhibitory by rationally arranging the resistors in the circuit. This is the first of its kind, enabling Hebbian and anti-Hebbian training without requiring additional processing of neural signals. Then, a neuron circuit is designed based on the proposed synapses. The robustness and compatibility of this neuron circuit are greatly enhanced by employing the clock-based square-wave pulsed to transmit spikes and modulate the synaptic weight. To study the performance of proposed synapses and circuit, simulations based on behavior models are carried out in the MATLAB Simulink and Simscape. Specially, a memristor model with balanced flexibility, efficiency, convergence, and emulation performance, is developed through including the nonlinear Joule effect. Using this memristor model in pattern learning, the influence of weak signal-induced weight variation on circuit performance can be rigorously assessed. This proposed circuit could give some inspiration for combining the analog memristive synapse and leaky integrate-and-fire neuron with digital control units, prompting their development as edge computing devices.
Comment: 10 pages, 20 figures