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Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051 microprocessor

Authors :
Batina, Lejla
Hwang, D
Hodjat, A
Preneel, Bart
Verbauwhede, Ingrid
Rao, JR
Sunar, B
Publication Year :
2005
Publisher :
Springer, 2005.

Abstract

Implementing public-key cryptography on platforms with limited resources, such as microprocessors, is a challenging task. Hardware/software co-design is often the only answer to implement the computationally intensive operations with limited memory and power at an acceptable speed. This contribution describes such a solution for Hyperelliptic Curve Cryptography (HECC). The proposed hardware/software co-design of the HECC system was implemented and co-simulated using the CEZEL design environment [3]. As a low-cost platform, we chose an 8-bit 8051 microprocessor to which one small hardware co-processor was added for field multiplication. We show that the Jacobian scalar multiplication can be computed in 2.488 sec at 12 MHz on this platform if a minimal hardware module is added i.e. a hardware multiply-add unit. This optimal solution provides a factor of 26 speed-up over a software-only solution. ispartof: pages:106-118 ispartof: Lecture Notes in Computer Science vol:3659 pages:106-118 ispartof: CHES 2005 location:SCOTLAND, Edinburgh date:29 Aug - 1 Sep 2005 status: published

Details

Language :
English
Database :
OpenAIRE
Accession number :
edsair.od......1131..bd813d904226c30c981299825d8a4dc2