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Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling

Authors :
Nancy Heylen
G. Verbinnen
Amey Mahadev Walke
Anne Vandooren
T. Zheng
Erik Rosseel
W. Li
Fumihiro Inoue
E. Vecchio
V. De Heyn
Andriy Hikavyy
Z. Wu
Bertrand Parvais
Dan Mocuta
Lan Peng
Liesbeth Witters
J. Franco
Lieve Teugels
Arindam Mallik
Niamh Waldron
Nouredine Rassoul
G. Jamieson
Katia Devriendt
Veeresh Deshpande
Nadine Collaert
Faculty of Economic and Social Sciences and Solvay Business School
Electronics and Informatics
Work and Organisational Psychology
Faculty of Engineering
Faculty of Medicine and Pharmacy
Human Physiology and Special Physiology of Physical Education
Source :
ICICDT
Publication Year :
2018
Publisher :
IEEE, 2018.

Abstract

In this paper, we review the current progress on 3D sequential device stacking, highlighting the main integration challenges and the possible technological solutions. Next, we explore the potential benefits of 3D sequential stacking at transistor level, CMOS level and for hybrid circuits.

Details

Database :
OpenAIRE
Journal :
2018 International Conference on IC Design & Technology (ICICDT)
Accession number :
edsair.doi.dedup.....fb38526227121e8b2c17205e8aff47dc
Full Text :
https://doi.org/10.1109/icicdt.2018.8399777