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A novel complementary push-push frequency doubler with negative resistor conversion gain enhancement
- Source :
- IEICE Electronics Express, 14(15):20170674. Institute of Electronics, Information and Communication Engineers (IEICE)
- Publication Year :
- 2017
-
Abstract
- This letter presents a 48 GHz frequency doubler in a 65 nm CMOS technology. The proposed frequency doubler is composed of a complementary push-push structure with negative resistance circuit for conversion gain enhancement. The maximum measured conversion gain reaches −6.1 dB at 48 GHz output frequency, and the 3-dB bandwidth is 40∼54 GHz. The fundamental rejection is above 29.5 dB. The size of the proposed frequency doubler chip is 0.72 × 0.36 mm2The total power consumption is 16 mW.
- Subjects :
- Materials science
business.industry
Frequency multiplier
Negative resistance
020208 electrical & electronic engineering
Bandwidth (signal processing)
CMOS
Electrical engineering
020206 networking & telecommunications
02 engineering and technology
Condensed Matter Physics
Chip
Electronic, Optical and Magnetic Materials
law.invention
Complementary push-push
Frequency doubler
Power consumption
law
0202 electrical engineering, electronic engineering, information engineering
Conversion gain
Electrical and Electronic Engineering
Resistor
business
Negative resistor
Subjects
Details
- Language :
- English
- ISSN :
- 13492543
- Volume :
- 14
- Issue :
- 15
- Database :
- OpenAIRE
- Journal :
- IEICE Electronics Express
- Accession number :
- edsair.doi.dedup.....f047df3817ade7b278ff6af1d5e17a8c