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Computing reliability: On the differences between software testing and software fault injection techniques
- Source :
- Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 50, pp.102-112. 〈10.1016/j.micpro.2017.02.007〉, Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 50, pp.102-112. ⟨10.1016/j.micpro.2017.02.007⟩, Microprocessors and Microsystems: Embedded Hardware Design, Microprocessors and Microsystems: Embedded Hardware Design, 2017, 50, pp.102-112. ⟨10.1016/j.micpro.2017.02.007⟩
- Publication Year :
- 2017
- Publisher :
- HAL CCSD, 2017.
-
Abstract
- International audience; System reliability has become a main concern during the computer-based system design process. It is one of the most important characteristics of the system quality. The continuous increase of the system complexity makes the reliability evaluation extremely costly. Therefore, there is need to develop new methods with less cost and effort. Furthermore, the system is vulnerable to both software and hardware faults. While the software faults are usually introduced by the programmer either at the design or the implementation stage of the software, the hardware faults are caused by physical phenomena affecting the hardware components, such as environmental perturbations, manufacturing defects, and aging-related phenomena. The software faults can only impact the software components. However, the hardware faults can propagate through the different system layers, and affect both the hardware and the software. This paper discusses the differences between the software testing and the software fault injections techniques used for reliability evaluation. We describe the mutation analysis as a method mainly used in software testing. Then, we detail the fault injection as a technique to evaluate the system reliability. Finally, we discuss how to use software mutation analysis in order to evaluate, at software level, the system reliability against hardware faults. The main advantage of this technique is its usability at early design stage of the system, when the instruction set architecture is not available. Experimental results run to evaluate faults occurring the memory show that the proposed approach significantly reduces the complexity of the system reliability evaluation in terms of time and cost.
- Subjects :
- Computer Networks and Communications
Computer science
Soft errors
Mutation testing
02 engineering and technology
Software
Hardware
Artificial Intelligence
Software sizing
Software fault tolerance
Fault injection
Regression testing
0202 electrical engineering, electronic engineering, information engineering
Software quality analyst
Software verification and validation
[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Programmer
Hardware architecture
business.industry
Usability
Software maintenance
Software metric
020202 computer hardware & architecture
System reliability
Hardware and Architecture
Embedded system
Component-based software engineering
Software construction
Avionics software
020201 artificial intelligence & image processing
[ SPI.NANO ] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Software reliability testing
business
Subjects
Details
- Language :
- English
- ISSN :
- 01419331 and 18729436
- Database :
- OpenAIRE
- Journal :
- Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 50, pp.102-112. 〈10.1016/j.micpro.2017.02.007〉, Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 50, pp.102-112. ⟨10.1016/j.micpro.2017.02.007⟩, Microprocessors and Microsystems: Embedded Hardware Design, Microprocessors and Microsystems: Embedded Hardware Design, 2017, 50, pp.102-112. ⟨10.1016/j.micpro.2017.02.007⟩
- Accession number :
- edsair.doi.dedup.....d8fa01107128942a71b35397b61f438b
- Full Text :
- https://doi.org/10.1016/j.micpro.2017.02.007〉