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Thermal-Aware Floorplanning Using Genetic Algorithms

Authors :
Hung, W. L.
Xie, Y.
Vijaykrishnan, N.
Addo-Quaye, C.
Theocharides, Theocharis
Irwin, M. J.
Theocharides, Theocharis [0000-0001-7222-9152]
Source :
ISQED, Proceedings-International Symposium on Quality Electronic Design, ISQED
Publication Year :
2005
Publisher :
IEEE, 2005.

Abstract

In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while optimizing the traditional design metric, chip area. The floorplanning problem is formulated as a genetic algorithm problem, and a tool called HotSpot is used to calculate floorplanning temperature based on the power dissipation, the physical dimension, and the location of modules. Area and/or temperature optimizations guide the genetic algorithm to generate the final fittest solution. The experimental results using MCNC benchmarks and a face detection chip show that our combined area and thermal optimization technique decreases the peak temperature sufficiently while providing floorplans that are as compact as the traditional area-oriented techniques.

Details

Database :
OpenAIRE
Journal :
Sixth International Symposium on Quality of Electronic Design (ISQED'05)
Accession number :
edsair.doi.dedup.....c4bbde9fc0737e15eb83b20aaae2c590