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Narrowing the margins with elastic clocks

Authors :
Juan A. Moya
Jonas Casanova
Jordi Cortadella
Djavad Amiri
F. Martorell
Luca Necchi
Emre Tuncer
Luciano Lavagno
Danil Sokolov
Carlos Macian
Universitat Politècnica de Catalunya. Departament de Ciències de la Computació
Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
Source :
UPCommons. Portal del coneixement obert de la UPC, Universitat Politècnica de Catalunya (UPC), Recercat. Dipósit de la Recerca de Catalunya, instname
Publication Year :
2010
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2010.

Abstract

The continuous shrinking of process geometries increases variability and demands for conservative margins that have a negative impact on performance. With conventional clocks, the cycle period has to be defined to accommodate the worst-case variations during the lifetime of the circuit. Elastic Clocks arise as a new paradigm to reduce the margins without sacrificing robustness. Their cycle-by-cycle adaptation to static and dynamic variability enables the use of reduced margins that only need to cover the differential variability of the circuit delays with regard to the elastic period. Given the substantial spatio-temporal correlation within every die, a significant reduction in the margins required to cover process variability, voltage and temperature fluctuations and aging can be achieved.

Details

Language :
English
Database :
OpenAIRE
Journal :
UPCommons. Portal del coneixement obert de la UPC, Universitat Politècnica de Catalunya (UPC), Recercat. Dipósit de la Recerca de Catalunya, instname
Accession number :
edsair.doi.dedup.....c4460a420001cc6bc2373802c34aaf73