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How to improve the silicon nanocrystal memory cell performances for low power applications
- Source :
- 2012 International Semiconductor Conference (CAS 2012), 2012 International Semiconductor Conference (CAS 2012), Oct 2012, Sinaia, Romania. ⟨10.1109/SMICND.2012.6400686⟩
- Publication Year :
- 2012
- Publisher :
- HAL CCSD, 2012.
-
Abstract
- International audience; In this paper we propose to optimize the 1T silicon nanocrystal (Si-nc) memory cell in order to reduce the energy consumption for low power applications. Optimized Channel Hot Electron Injection (a 4.5V programming window is reached consuming 1nJ) and Fowler-Nordheim programming are analyzed and compared. The tunnel oxide thickness, Si-ncs area coverage and SiN silicon nanocrystals capping layer are adjusted to optimize the data retention and endurance criteria. We present for the first time the endurance characteristics of a Si-nc cell up to 10 6 cycles with a final programming window of 4V.
- Subjects :
- Materials science
Silicon
chemistry.chemical_element
02 engineering and technology
7. Clean energy
01 natural sciences
Silicon nanocrystal memories
Memory cell
Low-power electronics
energy consumption
0103 physical sciences
0202 electrical engineering, electronic engineering, information engineering
Electronic engineering
Data retention
[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Quantum tunnelling
Hot-carrier injection
010302 applied physics
business.industry
tunnel oxide thickness
020206 networking & telecommunications
Energy consumption
Power (physics)
chemistry
Optoelectronics
business
Subjects
Details
- Language :
- English
- Database :
- OpenAIRE
- Journal :
- 2012 International Semiconductor Conference (CAS 2012), 2012 International Semiconductor Conference (CAS 2012), Oct 2012, Sinaia, Romania. ⟨10.1109/SMICND.2012.6400686⟩
- Accession number :
- edsair.doi.dedup.....8fc979721c52d7641677289d42bc3a43
- Full Text :
- https://doi.org/10.1109/SMICND.2012.6400686⟩