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HS3-DPG: Hierarchical Simulation for 3-D P/G Network

Authors :
Xiaoming Chen
Yu Wang
Hui Wang
Shuai Tao
Yuchun Ma
Yiyu Shi
Huazhong Yang
Source :
ASP-DAC
Publication Year :
2015
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2015.

Abstract

As different tiers are stacked together in 3-D integrated circuits, the power/ground (P/G) network simulation becomes more challenging than that of 2-D cases. In this brief, we propose a hierarchical simulation method suitable for 3-D P/G network (HS3-DPG), which takes advantage of the inherent hierarchical structure of 3-D P/G network. The port equivalent model (PEM) is introduced to mask the details of P/G grid in each tier. Besides, we introduce the locality property to further simplify the simulation. Some 3-D P/G network benchmarks extracted from industrial designs are used to verify the correctness of our method. Experimental results show that, HS3-DPG can achieve considerable speedup, while maintaining high accuracy. Simplified PEMs considering the locality property can save nearly 80% memory allocation compared with the full PEMs when the number of through-silicon-vias between the adjacent tiers becomes quite large.

Details

ISSN :
15579999 and 10638210
Volume :
23
Database :
OpenAIRE
Journal :
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Accession number :
edsair.doi.dedup.....839d97dd8fb6fa67a5317e282a9eb86b
Full Text :
https://doi.org/10.1109/tvlsi.2014.2358582