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Effect of die metallization layer ageing in the case of power semiconductor devices
- Source :
- European Journal of Electrical Engineering, European Journal of Electrical Engineering, Lavoisier, 2011, 14 (5), pp.569-585. ⟨10.3166/Geo.19.11-38⟩, European Journal of Electrical Engineering, 2011, 14 (5), pp.569-585. ⟨10.3166/Geo.19.11-38⟩
- Publication Year :
- 2011
- Publisher :
- International Information and Engineering Technology Association, 2011.
-
Abstract
- The paper describes ageing mechanisms of the metallization layer deposited on the chips of power semiconductor devices, and the effects of its ageing on the electrical characteristics of a COOLMOSTM Transistor. We have tried to link the changes in electrical performances to the metallization degradation, in order to better understand the origin of the physical mechanisms of ageing and the effects of the degradation of the metallization layer on electrical performances of tested devices.
- Subjects :
- Materials science
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
01 natural sciences
Die (integrated circuit)
law.invention
Hardware_GENERAL
law
0103 physical sciences
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering, electronic engineering, information engineering
Electronic engineering
SEMICONDUCTEUR
Electrical and Electronic Engineering
010302 applied physics
business.industry
020208 electrical & electronic engineering
Transistor
Semiconductor device
VIEILLISSEMENT
[SPI.TRON]Engineering Sciences [physics]/Electronics
Power (physics)
Ageing
FIABILITE
Optoelectronics
business
Layer (electronics)
Subjects
Details
- ISSN :
- 21033641
- Volume :
- 14
- Database :
- OpenAIRE
- Journal :
- European Journal of Electrical Engineering
- Accession number :
- edsair.doi.dedup.....6b5384ddfd347b8afffdd0f8612f9bca
- Full Text :
- https://doi.org/10.3166/ejee.14.569-585