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Custom Low Power Processor for Polar Decoding

Authors :
J. M. Pierre Langlois
David Binet
Yvon Savaria
Mathieu Leonardon
Christophe Jego
Camille Leroux
Université de Bordeaux (UB)
Laboratoire de l'intégration, du matériau au système (IMS)
Université Sciences et Technologies - Bordeaux 1-Institut Polytechnique de Bordeaux-Centre National de la Recherche Scientifique (CNRS)
Orange Labs R&D [Rennes]
France Télécom
Dép. de Génie Electrique
École Polytechnique de Montréal (EPM)
Source :
IEEE International Symposium on Circuits & Systems (ISCAS), IEEE International Symposium on Circuits & Systems (ISCAS), May 2018, Florence, Italy, ISCAS, HAL
Publication Year :
2018
Publisher :
HAL CCSD, 2018.

Abstract

International audience; Cloud Radio Access Network is foreseen as one of the key features of the future 5G mobile communication standard. In this context, all the baseband processing is intended to be performed on CPUs in order to keep a high level of flexibility. The challenge is then to propose efficient software implementations of baseband processing algorithms that guarantee a sufficient throughput, while limiting the energy consumption. In this paper, as an alternative to general purpose processors, we propose an implementation of an Application Specific Instruction set Processor customized for the Successive Cancellation decoding of polar codes. The resulting software decoder achieves throughputs similar to state-of-the-art ARM processor implementations, while reducing the energy consumption by a factor 10.

Details

Language :
English
Database :
OpenAIRE
Journal :
IEEE International Symposium on Circuits & Systems (ISCAS), IEEE International Symposium on Circuits & Systems (ISCAS), May 2018, Florence, Italy, ISCAS, HAL
Accession number :
edsair.doi.dedup.....52f6f63be0f1db606df0ba55ad1352b0