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A precision trim technique for monolithic analog circuits

Authors :
G. Erdi
Source :
IEEE Journal of Solid-State Circuits. 10:412-416
Publication Year :
1975
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 1975.

Abstract

A technique for permanent adjustment of precision analog circuits at wafer test by selective shorting of Zener diodes is presented. Analytical details of the trimming procedure and a physical description of diode short-circuiting are given. The method is applied to a precision operational amplifier with input offset voltage reduced to 10 /spl mu/V. The necessity of optimizing other related parameters is demonstrated. Practical considerations limiting wafer test accuracy are discussed. Circuit performance is summarized.

Details

ISSN :
1558173X and 00189200
Volume :
10
Database :
OpenAIRE
Journal :
IEEE Journal of Solid-State Circuits
Accession number :
edsair.doi.dedup.....50718b199f02794951c7fa6c44c9f910
Full Text :
https://doi.org/10.1109/jssc.1975.1050635