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Regional Consistency: Programmability and Performance for Non-Cache-Coherent Systems

Regional Consistency: Programmability and Performance for Non-Cache-Coherent Systems

Authors :
Srinidhi Varadarajan
Bharath Ramesh
Calvin J. Ribbens
Source :
TrustCom/ISPA/IUCC
Publication Year :
2013
Publisher :
arXiv, 2013.

Abstract

Parallel programmers face the often irreconcilable goals of programmability and performance. HPC systems use distributed memory for scalability, thereby sacrificing the programmability advantages of shared memory programming models. Furthermore, the rapid adoption of heterogeneous architectures, often with non-cache-coherent memory systems, has further increased the challenge of supporting shared memory programming models. Our primary objective is to define a memory consistency model that presents the familiar thread-based shared memory programming model, but allows good application performance on non-cache-coherent systems, including distributed memory clusters and accelerator-based systems. We propose regional consistency (RegC), a new consistency model that achieves this objective. Results on up to 256 processors for representative benchmarks demonstrate the potential of RegC in the context of our prototype distributed shared memory system.<br />Comment: 8 pages, 7 figures, 1 table; as submitted to CCGRID 2013

Details

Database :
OpenAIRE
Journal :
TrustCom/ISPA/IUCC
Accession number :
edsair.doi.dedup.....4cd492b838d4537a1b4d263675c3318e
Full Text :
https://doi.org/10.48550/arxiv.1301.4490