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Dual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications

Authors :
Aibin Yan
Huaguo Liang
Zhengfeng Huang
Jie Cui
Xiaoqing Wen
Zuobin Ying
Zhelong Xu
Patrick Girard
Anhui University [Hefei]
Hefei University of Technology (HFUT)
TEST (TEST)
Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM)
Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)
Kyushu Institute of Technology
Source :
ISCAS, IEEE International Symposium on Circuits and Systems (ISCAS), IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Sevilla (virtual), Spain. pp.1-5, ⟨10.1109/ISCAS45731.2020.9181135⟩
Publication Year :
2020
Publisher :
IEEE, 2020.

Abstract

International audience; This paper presents a novel dual-interlocked storagecell (DICE)-based double-node-upset (DNU) self-recoverable, namely DURI-FF, in the nano-scale CMOS technology. The master latch of the DURI-FF cell consists of three transmission gates (TGs) and three interlocked DICEs with three common nodes. The common nodes are connected to TGs for value initialization. The slave latch of the DURI-FF cell comprises six TGs, six inverters and three interlocked DICEs. The outputs of the inverters respectively feed the internal nodes of the slave latch. The interlocked DICEs make the master latch and the slave latch DNU self-recoverable. Simulation results validate the DNU self-recoverability of the proposed DURI-FF cell. Moreover, compared with the state-of-the-art hardened flip-flop cells, the proposed DURI-FF cell achieves roughly 43% delay reduction at the cost of moderate silicon area and power dissipation.

Details

Database :
OpenAIRE
Journal :
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Accession number :
edsair.doi.dedup.....4c02d013c1fb3f4a4e8e69b5a004fb37
Full Text :
https://doi.org/10.1109/iscas45731.2020.9181135