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Influence of gate bias on the avalanche ruggedness of SiC power MOSFETs
- Source :
- 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD).
- Publication Year :
- 2017
- Publisher :
- IEEE, 2017.
-
Abstract
- This paper investigates the effect of negative gate bias voltage (V gs ) on the avalanche breakdown robustness of commercial state-of-the-art silicon carbide (SiC) power MOSFETs. The device's ability to withstand energy dissipation during avalanche regime is a connoting figure of merit for all applications requiring load dumping and/or benefiting from snubber-less converter design. The superior material properties of SiC material means that SiC MOSFETs even at 1200V exhibit significant intrinsic avalanche robustness.
- Subjects :
- Materials science
Energy Engineering and Power Technology
Silicon carbide
02 engineering and technology
01 natural sciences
chemistry.chemical_compound
Robustness (computer science)
0103 physical sciences
Robustne
0202 electrical engineering, electronic engineering, information engineering
Figure of merit
Electrical and Electronic Engineering
Power MOSFET
Avalanche ruggeddne
010302 applied physics
Avalanche diode
business.industry
Undamped inductive swithching
Electronic, Optical and Magnetic Material
020208 electrical & electronic engineering
Electrical engineering
Biasing
Dissipation
Avalanche breakdown
chemistry
Optoelectronics
business
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)
- Accession number :
- edsair.doi.dedup.....1ff1823d17d12a044ab0a2a75426cefc
- Full Text :
- https://doi.org/10.23919/ispsd.2017.7988986